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HV9308 HV9408 32-Channel Serial To Parallel Converter With High Voltage Push-Pull Outputs Ordering Information Package Options Device Recommended Operating VPP max 80V 80V 44 J-Lead Quad Plastic Chip Carrier HV9308PJ HV9408PJ Dice in Waffle Pack Chip Carrier HV9308X HV9408X HV9308 HV9408 Features Processed with HVCMOS(R) technology Low power level shifting Shift register speed 8MHz Latched data outputs 5V CMOS compatible inputs Forward and reverse shifting options Diode to VPP allows efficient power recovery 44-lead ceramic surface mount package Hi-Rel processing available General Description The HV93 and HV94 are low voltage serial to high voltage parallel converters with push-pull outputs. These devices have been designed for use as drivers for AC-electroluminescent displays. They can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays. These devices consist of a 32-bit shift register, 32 latches, and control logic to enable outputs. HVOUT1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. The HV94 shifts in the counterclockwise direction when viewed from the top of the package and the HV93 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operation of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low. Absolute Maximum Ratings1 Supply voltage, VDD2 Supply voltage, VPP2 Logic input Ground levels2 -0.5V to +7V -0.5V to +90V -0.5 to VDD + 0.5V 1.5A 1200mW -40C to 85C -65C to +150C 260C current3 Continuous total power dissipation4 Operating temperature range Storage temperature range Lead temperature 1.6mm (1/16 inch) from case for 10 seconds Notes: 1. Device will survive (but operation may not be specified or guaranteed) at these extremes. 2. All voltages are referenced to GND1. 3. Duty cycle is limited by the total power dissipated in the package. 4. For operation above 25C ambient derate linearly to maximum operating temperature at 20mW/C. 02/96/022 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. 1 HV9308/HV9408 Electrical Characteristics (VPP = 60V, VDD = 5V, TA =25C) DC Characteristics Symbol IPP IDDQ IDD VOH (Data) VOL (Data) IIH IIL VOC VOH VOL Parameter VPP Supply Current IDD Supply Current (Quiescent) IDD Supply Current (Operating) Shift Register Output Voltage Shift Register Output Voltage Current Leakage, any input Current Leakage, any input HVOUT Output Clamp Diode Voltage HVOUT Output when Sourcing HVOUT Output when Sinking 52 4.0 VDD-0.5 0.5 1.0 -1.0 -1.5 Min Max 100 100 15 Units A A mA V V A A V V V Conditions HVOUT outputs HIGH to LOW All inputs = VDD or GND VDD = VDD max, fCLK = 8 MHz IO = -100A IO = 100A Input = VDD Input = GND IOC = -5mA IOH = -20mA, 0 to 70C IOL = 5mA, 0 to 70C AC Characteristics Symbol fCLK tWL or tWH tSU tH tDLH (Data) tDHL (Data) tDLE tWLE tSLE tON tOFF Parameter Clock Frequency Clock width, HIGH or LOW Setup time before CLK rises Hold time after CLK rises Data Output Delay after L to H CLK Data Output Delay after H to L CLK LE Delay after L to H CLK Width of LE Pulse LE Setup Time before L to H CLK Delay from LE to HVOUT, L to H Delay from LE to HVOUT, H to L 50 50 50 500 500 62 25 10 110 110 Min Max 8.0 Units MHz ns ns ns ns ns ns ns ns ns ns CL = 15pF CL = 15pF Conditions Recommended Operating Conditions Symbol VDD VPP VIH VIL fCLK TA Parameter Logic Voltage Supply High Voltage Supply Input HIGH Voltage Input LOW Voltage Clock Frequency Operating Free-Air Temperature Plastic Ceramic Notes: Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. 4. Apply VPP. Power-down sequence should be the reverse of the above. The VPP should not drop below VDD during operations. Min 4.5 8.0 VDD-0.5 0 0 -40 -55 Max 5.5 80 VDD 0.5 8.0 +85 +125 Units V V V V MHz C C 2 HV9308/HV9408 Input and Output Equivalent Circuits VDD VDD VPP Input Data Out HVOUT GND Logic Inputs GND Logic Data Output GND High Voltage Outputs Switching Waveforms VIH Data Input 50% tSU Clock 50% tWL 50% tWH 50% VOL Data Out tDLH 50% tDHL VOH VOL Data Valid tH VIH 50% 50% VIL VOH 50% VIL Latch Enable tDLE 50% tWLE 50% tSLE VIH VOL HVOUT w/ S/R LOW tOFF HVOUT w/ S/R HIGH 90% 10% VOH VOL 10% tON 90% VOH VOL 3 HV9308/HV9408 Functional Block Diagram Output Enable Latch Enable VDD Data Input HVOUT 1 Clock HVOUT 2 * * * 32 Outputs Total * * * HVOUT 31 32 bit Static Shift Register 32 Latches Data Out HVOUT 32 Function Tables Data Input H L X * CLK* Data Output H L No No Change = LOW-to-HIGH level transition Data Input X X H L LE X L H H OE L H H H HVOUT Output All HVOUT = LOW Previous Latched Data H L 4 HV9308/HV9408 Pin Configuration HV93 44 Pin J-Lead Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 17 HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Data Out N/C N/C N/C Clock Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function GND VPP VDD Latch Enable Data In Output Enable N/C HVOUT 32 HVOUT 31 HVOUT 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 HVOUT 23 HVOUT 22 HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 Package Outline 39 38 37 36 35 34 33 32 31 30 29 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 28 27 26 25 24 23 22 21 20 19 18 top view 44-pin J-Lead Package HV94 44 Pin J-Lead Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 16 HVOUT 17 HVOUT 18 HVOUT 19 HVOUT 20 HVOUT 21 HVOUT 22 HVOUT 23 HVOUT 24 HVOUT 25 HVOUT 26 HVOUT 27 HVOUT 28 HVOUT 29 HVOUT 30 HVOUT 31 HVOUT 32 Data Out N/C N/C N/C Clock Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function GND VPP VDD Latch Enable Data In Output Enable N/C HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 HVOUT 8 HVOUT 9 HVOUT 10 HVOUT 11 HVOUT 12 HVOUT 13 HVOUT 14 HVOUT 15 02/06//02 (c)2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 5 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com |
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